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Computer Architecture & Organization

Proposed Q&A site for people that want to know how the computer hardware is structured and organized.
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Duplicate of Super User, Computer Science, and Electrical Engineering

may 13 at 5:28 Nicol Bolas 161

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46 Example Questions (5 closed)

active oldest votes
up vote 13 down vote
What is the difference between RISC and CISC architectures?
added by Hoa Long Tam Jan 6 '11 at 9:30
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up vote 12 down vote
I know how instructions are sent to the CPU, but how are instructions sent to the GPU?
added by Jonas Aug 26 '10 at 18:09
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up vote 12 down vote
What does pipelining accomplish?
added by warren Aug 26 '10 at 20:58
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up vote 10 down vote
How can PCI Express that is serial be faster than PCI that is parallell?
added by Jonas Aug 26 '10 at 18:14
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up vote 10 down vote
What is the Front Side Bus used for?
added by Jonas Aug 27 '10 at 11:20
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up vote 10 down vote
How processors with more cores improves performance of my computer?
added by chanchal1987 Aug 27 '10 at 11:37
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up vote 10 down vote
When would I want to use ECC, registered, buffered, unbuffered, etc., types of memory?
added by warren, edited by WikiSpeedia hang-around Sep 7 '10 at 18:42
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up vote 10 down vote
What are the main differences between the IA-64 and x86-64 instruction sets?
added by Jaime Soto Jan 7 '11 at 20:09
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It's a list question, and thus bad for any SE site. – Nicol Bolas May 13 at 0:53
up vote 10 down vote
What techniques exist for branch prediction and what are their comparative advantages/disadvantages?
added by Hoa Long Tam Jan 8 '11 at 8:59
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It's a list question, and thus bad for any SE site. – Nicol Bolas May 13 at 0:53
up vote 10 down vote
How does cache prefetching work?
added by Hoa Long Tam Jan 11 '11 at 19:15
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up vote 10 down vote
How do caches work on the CPU?
added by deathly809 May 28 '11 at 15:33
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up vote 8 down vote
How does a DSP work differently than a regular CPU?
added by Traroth Jun 15 '11 at 9:49
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up vote 7 down vote
How is internal memory organised on reconfigurable computing architectures?
added by Graham Sunderland, edited by WikiSpeedia hang-around May 8 at 19:38
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up vote 4 down vote
What are good simulation tools for regression testing some proposed changes to a CPU architecture?
added by David Cary, edited by WikiSpeedia hang-around May 8 at 19:40
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up vote 3 down vote
What does dual core mean?
added by Sniffer Aug 26 '10 at 20:46
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2  
Super user. Let's make this a site for experts on computer organization and architecture, not for generic technology questions that seem to relate to comp arch. – Adam Davis Jan 7 '11 at 16:41
up vote 3 down vote
Why are SSD drives faster than 'normal' hard drives?
added by CrazyJugglerDrummer Aug 28 '10 at 14:07
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up vote 3 down vote
How do I share a single floating-point multiplier between 2 or more CPUs on a FPGA?
added by David Cary Sep 28 '11 at 18:05
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up vote 2 down vote
What does RAID mean?
added by Sniffer Aug 26 '10 at 20:47
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2  
This is a super user question. – Chris Aug 31 '10 at 11:02
2  
This question asks to decipher technology acronym. If it was changed so it instead asked about how controllers performed the RAID function, then it would work. – Adam Davis Jan 7 '11 at 16:40
up vote 2 down vote
What is dual/triple/quad channel RAM?
added by Graham Sunderland Feb 4 '11 at 13:42
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2  
I think this is a good on-topic question as long as you want to hear about the detailed technical explanations haha – deathly809 May 28 '11 at 15:27
up vote 1 down vote
How lower level hardware actually deals with -ve operations using 2's complement ?
added by Ahmed Oct 11 '10 at 9:53
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up vote 1 down vote
What happens when there is write to a cacheline in a shared state?
added by Maciej Piechotka, edited by WikiSpeedia hang-around May 8 at 19:39
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up vote 0 down vote
How do I partition my hard drive? [closed]
added by Sniffer Aug 26 '10 at 20:45
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closed as off topic by warren, chanchal1987, Jonas, Sam Erde, dthorpe Aug 31 '10 at 16:17

This question does not relate to the topic of the proposal.
It was closed as part of an automated migration of off-topic to close votes on September 29, 2011.

up vote 0 down vote
Why can't I see all the partitions of my flash drive on Windows? [closed]
added by nik Aug 27 '10 at 2:39
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closed as off topic by chanchal1987, Jonas, Sam Erde, macs, gkrogers Jan 8 '11 at 10:25

This question does not relate to the topic of the proposal.
It was closed as part of an automated migration of off-topic to close votes on September 29, 2011.

up vote 0 down vote
What are logical drives?
added by chanchal1987, edited by WikiSpeedia hang-around Sep 7 '10 at 18:44
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2  
This is Super User question. – Dipan Mehta Nov 27 '11 at 20:04
up vote 0 down vote
What is the system requirement of <software name>? [closed]
added by chanchal1987 Aug 27 '10 at 11:34
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closed as off topic by Souhardya Maity, Jonas, warren, dthorpe, Sam Erde Aug 29 '10 at 12:57

This question does not relate to the topic of the proposal.
It was closed as part of an automated migration of off-topic to close votes on September 29, 2011.

Posted as off-topic... – chanchal1987 Aug 27 '10 at 11:35
up vote 0 down vote
How does a heat sink work? [closed]
added by CrazyJugglerDrummer Aug 28 '10 at 14:06
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closed as off topic by Sam Erde, Chris, dthorpe, macs, Adam Davis Jan 7 '11 at 16:40

This question does not relate to the topic of the proposal.
It was closed as part of an automated migration of off-topic to close votes on September 29, 2011.

up vote 0 down vote
Would it be useful to use several simple micro-controllers like AtmegaXXX to demonstrate inter-process communication?
added by vikingosegundo Aug 28 '10 at 21:16
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up vote 0 down vote
The difference between the architecture of hard disk memory and flash memory .
added by Ahmed Oct 12 '10 at 22:58
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up vote 0 down vote
If I build a supercomputer using several motherboards with CPU, memory, GPU and harddrive, how can I evaluate the needed power supply?
added by Traroth Jun 15 '11 at 9:52
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up vote 0 down vote
Where can I find documentation about the Thunderbolt I/O technology?
added by Traroth Jun 15 '11 at 9:53
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up vote 0 down vote
In a two-issue in-order RISC, what is the performance benefit of a 4R-2W reg file vs 3R-1W and some stalls? Are there any papers on this?
added by Jan Gray, edited by WikiSpeedia hang-around May 8 at 19:40
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up vote 0 down vote
How does RTL differ between microcode and other methods?
added by billt Sep 28 '11 at 14:53
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up vote 0 down vote
Why is dual-channel memory faster than single-channel?
added by MGZero Oct 20 '11 at 18:33
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up vote 0 down vote
What will Ivybridge offer that Sandybridge already doesn't?
added by MGZero Oct 21 '11 at 13:07
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up vote 0 down vote
How computationally efficient are data flow architectures in different application domains?
added by David Pointer Dec 22 '11 at 17:35
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up vote 0 down vote
What is an effective general purpose method for stack processor architecture(s) to access I/O devices?
added by David Pointer Mar 2 at 20:48
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up vote 0 down vote
How to determine computational efficiency for a CPU-only system and for a heterogeneous CPU/GPU system?
added by David Pointer Mar 2 at 21:42
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up vote 0 down vote
What parts of a processor are validated using theorem provers?
added by Guy Coder Mar 27 at 10:26
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up vote 0 down vote
What are the different types of cores that can be put into a SOC (System on a Chip)?
added by Guy Coder Mar 27 at 10:32
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up vote 0 down vote
What is the memory hierarchy?
added by blacklung Apr 20 at 1:06
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